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CHES 2024

A

International Conference on Cryptographic Hardware and Embedded Systems

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99
accepted papers
389
authors
September, 2024
dates
Canada
location

99 / 99 papers

  1. 1
    1/0 Shades of UC: Photonic Side-Channel Analysis of Universal Circuits
    Dev M. Mehta
    ,
    Mohammad Hashemi
    ,
    Domenic Forte
    ,
    Shahin Tajik
    ,
    Fatemeh Ganji
  2. 2
    1LUTSensor: Detecting FPGA Voltage Fluctuations using LookUp Tables
    Darshana Jayasinghe
    ,
    Brian Udugama
    ,
    Sri Parameswaran
  3. 3
    A Deep Analysis of two Glitch-Free Hardware Masking Schemes SESYM and LMDPL
    Nicolai Müller
    ,
    Daniel Lammers
    ,
    Amir Moradi
  4. 4
    A Highly-efficient Lattice-based Post-Quantum Cryptography Processor for IoT Applications
    Zewen Ye
    ,
    Ruibing Song
    ,
    Hao Zhang
    ,
    Donglong Chen
    ,
    Ray Chak-Chung Cheung
    ,
    Kejie Huang
  5. 5
    A Low-Latency High-Order Arithmetic to Boolean Masking Conversion
    Jiangxue Liu
    ,
    Cankun Zhao
    ,
    Shuohang Peng
    ,
    Bohan Yang
    ,
    Hang Zhao
    ,
    Xiangdong Han
    ,
    Min Zhu
    ,
    Shaojun Wei
    ,
    Leibo Liu
  6. 6
    A Not So Discrete Sampler: Power Analysis Attacks on HAWK signature scheme
    Morgane Guerreau
    ,
    Mélissa Rossi
  7. 7
    A Tale of Snakes and Horses: Amplifying Correlation Power Analysis on Quadratic Maps
    Anna Guinet
    ,
    Georg Land
    ,
    Ioan Gabriel Bucur
    ,
    Tim Güneysu
  8. 8
    All You Need Is Fault: Zero-Value Attacks on AES and a New λ-Detection M&M
    Haruka Hirata
    ,
    Daiki Miyahara
    ,
    Victor Arribas
    ,
    Yang Li
    ,
    Noriyuki Miura
    ,
    Svetla Nikova
    ,
    Kazuo Sakiyama
  9. 9
    An Algebraic Approach for Evaluating Random Probing Security With Application to AES
    Vahid Jahandideh
    ,
    Bart Mennink
    ,
    Lejla Batina
  10. 10
    Another Evidence to not Employ Customized Masked Hardware Identifying and Fixing Flaws in SCARV
    Felix Uhle
    ,
    Florian Stolz
    ,
    Amir Moradi
  11. 11
    Automated Generation of Fault-Resistant Circuits
    Nicolai Müller
    ,
    Amir Moradi
  12. 12
    Bake It Till You Make It Heat-induced Power Leakage from Masked Neural Networks
    Dev M. Mehta
    ,
    Mohammad Hashemi
    ,
    David Selasi Koblah
    ,
    Domenic Forte
    ,
    Fatemeh Ganji
  13. 13
    Breaking Ground: A New Area Record for Low-Latency First-Order Masked SHA-3 Advancing from the 4x Area Era to the 3x Area Era
    Cankun Zhao
    ,
    Hang Zhao
    ,
    Jiangxue Liu
    ,
    Bohan Yang
    ,
    Wenping Zhu
    ,
    Shuying Yin
    ,
    Min Zhu
    ,
    Shaojun Wei
    ,
    Leibo Liu
  14. 14
    CalyPSO: An Enhanced Search Optimization based Framework to Model Delay-based PUFs
    Nimish Mishra
    ,
    Kuheli Pratihar
    ,
    Satota Mandal
    ,
    Anirban Chakraborty
    ,
    Ulrich Rührmair
    ,
    Debdeep Mukhopadhyay
  15. 15
    Carry Your Fault: A Fault Propagation Attack on Side-Channel Protected LWE-based KEM
    Suparna Kundu
    ,
    Siddhartha Chowdhury
    ,
    Sayandeep Saha
    ,
    Angshuman Karmakar
    ,
    Debdeep Mukhopadhyay
    ,
    Ingrid Verbauwhede
  16. 16
    CASA: A Compact and Scalable Accelerator for Approximate Homomorphic Encryption
    Pengzhou He
    ,
    Samira Carolina Oliva Madrigal
    ,
    Çetin Kaya Koç
    ,
    Tianyou Bao
    ,
    Jiafeng Xie
  17. 17
    Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches
    Johannes Haring
    ,
    Vedad Hadzic
    ,
    Roderick Bloem
  18. 18
    Combined Threshold Implementation
    Jakob Feldtkeller
    ,
    Jan Richter-Brockmann
    ,
    Pascal Sasdrich
    ,
    Tim Güneysu
  19. 19
    Compact Circuits for Efficient Möbius Transform
    Subhadeep Banik
    ,
    Francesco Regazzoni
  20. 20
    Compress: Generate Small and Fast Masked Pipelined Circuits
    Gaëtan Cassiers
    ,
    Barbara Gigerl
    ,
    Stefan Mangard
    ,
    Charles Momin
    ,
    Rishub Nagpal
  21. 21
    ConvKyber: Unleashing the Power of AI Accelerators for Faster Kyber with Novel Iteration-based Approaches
    Tian Zhou
    ,
    Fangyu Zheng
    ,
    Guang Fan
    ,
    Lipeng Wan
    ,
    Wenxu Tang
    ,
    Yixuan Song
    ,
    Yi Bian
    ,
    Jingqiang Lin
  22. 22
    Correction Fault Attacks on Randomized CRYSTALS-Dilithium
    Elisabeth Krahmer
    ,
    Peter Pessl
    ,
    Georg Land
    ,
    Tim Güneysu
  23. 23
    CrISA-X: Unleashing Performance Excellence in Lightweight Symmetric Cryptography for Extendable and Deeply Embedded Processors
    Oren Ganon
    ,
    Itamar Levi
  24. 24
    Defeating Low-Cost Countermeasures against Side-Channel Attacks in Lattice-based Encryption A Case Study on Crystals-Kyber
    Prasanna Ravi
    ,
    Thales B. Paiva
    ,
    Dirmanto Jap
    ,
    Jan-Pieter D'Anvers
    ,
    Shivam Bhasin
  25. 25
    Distribution of Signal to Noise Ratio and Application to Leakage Detection
    Mathieu Des Noes
  26. 26
    Efficient ASIC Architecture for Low Latency Classic McEliece Decoding
    Daniel Fallnich
    ,
    Christian Lanius
    ,
    Shutao Zhang
    ,
    Tobias Gemmeke
  27. 27
    Efficient Table-Based Masking with Pre-processing
    Juelin Zhang
    ,
    Taoyun Wang
    ,
    Yiteng Sun
    ,
    Fanjie Ji
    ,
    Bohan Wang
    ,
    Lu Li
    ,
    Yu Yu
    ,
    Weijia Wang
  28. 28
    Elastic MSM: A Fast, Elastic and Modular Preprocessing Technique for Multi-Scalar Multiplication Algorithm on GPUs
    Xudong Zhu
    ,
    Haoqi He
    ,
    Zhengbang Yang
    ,
    Yi Deng
    ,
    Lutan Zhao
    ,
    Rui Hou
  29. 29
    eLIMInate: a Leakage-focused ISE for Masked Implementation
    Hao Cheng
    ,
    Daniel Page
    ,
    Weijia Wang
  30. 30
    Enabling PERK and other MPC-in-the-Head Signatures on Resource-Constrained Devices
    Slim Bettaieb
    ,
    Loïc Bidoux
    ,
    Alessandro Budroni
    ,
    Marco Palumbi
    ,
    Lucas Pandolfo Perin
  31. 31
    EstraNet: An Efficient Shift-Invariant Transformer Network for Side-Channel Analysis
    Suvadeep Hajra
    ,
    Siddhartha Chowdhury
    ,
    Debdeep Mukhopadhyay
  32. 32
    Evict+Spec+Time: Exploiting Out-of-Order Execution to Improve Cache-Timing Attacks
    Shing Hing William Cheng
    ,
    Chitchanok Chuengsatiansup
    ,
    Daniel Genkin
    ,
    Dallas McNeil
    ,
    Toby Murray
    ,
    Yuval Yarom
    ,
    Zhiyuan Zhang
  33. 33
    Exploiting Small-Norm Polynomial Multiplication with Physical Attacks Application to CRYSTALS-Dilithium
    Olivier Bronchain
    ,
    Melissa Azouaoui
    ,
    Mohamed ElGhamrawy
    ,
    Joost Renes
    ,
    Tobias Schneider
  34. 34
    Fallen Sanctuary: A Higher-Order and Leakage-Resilient Rekeying Scheme
    Rei Ueno
    ,
    Naofumi Homma
    ,
    Akiko Inoue
    ,
    Kazuhiko Minematsu
  35. 35
    Fast and Accurate: Efficient Full-Domain Functional Bootstrap and Digit Decomposition for Homomorphic Computation
    Shihe Ma
    ,
    Tairong Huang
    ,
    Anyu Wang
    ,
    Qixian Zhou
    ,
    Xiaoyun Wang
  36. 36
    Fast and Clean: Auditable high-performance assembly via constraint solving
    Amin Abdulrahman
    ,
    Hanno Becker
    ,
    Matthias J. Kannwischer
    ,
    Fabien Klein
  37. 37
    Fast Transciphering Via Batched And Reconfigurable LUT Evaluation
    Leonard Schild
    ,
    Aysajan Abidin
    ,
    Bart Preneel
  38. 38
    Faster Bootstrapping via Modulus Raising and Composite NTT
    Zhihao Li
    ,
    Ying Liu
    ,
    Xianhui Lu
    ,
    Ruida Wang
    ,
    Benqiang Wei
    ,
    Chunling Chen
    ,
    Kunpeng Wang
  39. 39
    Faster Complete Addition Laws for Montgomery Curves
    Reza Rezaeian Farashahi
    ,
    Mojtaba Fadavi
    ,
    Soheila Sabbaghian
  40. 40
    Faster NTRU-based Bootstrapping in less than 4 ms
    Zhihao Li
    ,
    Xianhui Lu
    ,
    Zhiwei Wang
    ,
    Ruida Wang
    ,
    Ying Liu
    ,
    Yinhang Zheng
    ,
    Lutan Zhao
    ,
    Kunpeng Wang
    ,
    Rui Hou
  41. 41
    Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults
    Simon Tollec
    ,
    Vedad Hadzic
    ,
    Pascal Nasahl
    ,
    Mihail Asavoae
    ,
    Roderick Bloem
    ,
    Damien Couroussé
    ,
    Karine Heydemann
    ,
    Mathieu Jan
    ,
    Stefan Mangard
  42. 42
    FaultDetective Explainable to a Fault, from the Design Layout to the Software
    Zhenyuan Liu
    ,
    Dillibabu Shanmugam
    ,
    Patrick Schaumont
  43. 43
    Gadget-based Masking of Streamlined NTRU Prime Decapsulation in Hardware
    Georg Land
    ,
    Adrian Marotzke
    ,
    Jan Richter-Brockmann
    ,
    Tim Güneysu
  44. 44
    Generalized Power Attacks against Crypto Hardware using Long-Range Deep Learning
    Elie Bursztein
    ,
    Luca Invernizzi
    ,
    Karel Král
    ,
    Daniel Moghimi
    ,
    Jean-Michel Picod
    ,
    Marina Zhang
  45. 45
    Gleeok: A Family of Low-Latency PRFs and its Applications to Authenticated Encryption
    Ravi Anand
    ,
    Subhadeep Banik
    ,
    Andrea Caforio
    ,
    Tatsuya Ishikawa
    ,
    Takanori Isobe
    ,
    Fukang Liu
    ,
    Kazuhiko Minematsu
    ,
    Mostafizar Rahman
    ,
    Kosei Sakamoto
  46. 46
    HAETAE: Shorter Lattice-Based Fiat-Shamir Signatures
    Jung Hee Cheon
    ,
    Hyeongmin Choe
    ,
    Julien Devevey
    ,
    Tim Güneysu
    ,
    Dongyeon Hong
    ,
    Markus Krausz
    ,
    Georg Land
    ,
    Marc Möller
    ,
    Damien Stehlé
    ,
    MinJune Yi
  47. 47
    High-assurance zeroization
    Santiago Arranz-Olmos
    ,
    Gilles Barthe
    ,
    Ruben Gonzalez
    ,
    Benjamin Grégoire
    ,
    Vincent Laporte
    ,
    Jean-Christophe Léchenet
    ,
    Tiago Oliveira
    ,
    Peter Schwabe
  48. 48
    High-Performance Design Patterns and File Formats for Side-Channel Analysis
    Jonah Bosland
    ,
    Stefan Ene
    ,
    Peter Baumgartner
    ,
    Vincent Immler
  49. 49
    High-Performance Hardware Implementation of MPCitH and Picnic3
    Guoxiao Liu
    ,
    Keting Jia
    ,
    Puwen Wei
    ,
    Lei Ju
  50. 50
    Hints from Hertz: Dynamic Frequency Scaling Side-Channel Analysis of Number Theoretic Transform in Lattice-Based KEMs
    Tianrun Yu
    ,
    Chi Cheng
    ,
    Zilong Yang
    ,
    Yingchen Wang
    ,
    Yanbin Pan
    ,
    Jian Weng